| The FE2000
is the architecture of a family of proprietary single-chip
media processors configurable with up to 8 parallel
DSPs and a 32-bit RISC engine for unmatched flexibility
and high-performance in demanding applications such
as still image and video data processing. It is an extremely
low-cost, high-performance platform optimized for mass
market cell phones with up to • 5
MPIXEL STILL IMAGE RESOLUTION • MPEG4
VIDEO ENCODE AT UP TO 20 FPS IN
FULL DTV RESOLUTION • MP3
AUDIO - AND MORE. But you can use it in a range
of devices from personal media
players to digital still cameras to deliver features
of products based on silicon costing much, much more. |
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| FE2000
Simplified Block Diagram |
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| All FE2000-based
chips can also load firmware expansion code at boot time
to upgrade or enhance functionality.
Engineering teams can easily use this capability to quickly
bring to market a more robust solution, add a new codec
or
a set of new I/O devices to an existing FE2000-based
system, provided underlying FE2000 hardware support exists.
This flexibility enables customers to bring new products
to market extremely rapidly with minimal engineering
effort, or
even to provide field upgrades for FE2000-based products. |
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| Finally,
processor flexibility and scalability are enhanced by
a broad range of memory and peripheral I/O support
options such as: |
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- dual display support for clamshell handsets
- low-power pass through mode for host display control
when media functions are not being used
- two USB 1.1 ports
- support for SDRAM from 16 Mbits up to 256 Mbits (1Mx16
up to 16Mx16)
- support for PSRAM/SRAM up to 128 Mbits
- two programmable parallel interfaces
- programmable serial interface
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LEFT: Raw Bayer data captured by sensor. RIGHT: Image
convereted
to RGB and processed by FE2000 Image Signal Processor. |
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